1. Field of the Invention
The present invention relates to a method for handling an overflow condition in a processor.
2. Background of the Invention
Modern computers having a superscalar architecture are able to execute several instructions concurrently. The superscalar approach, however, depends on the ability to execute multiple instructions in parallel. The instructions following a branch instruction have a procedural dependency on the branch instruction and cannot be executed until the branch is executed. This is true regardless of whether the branch is taken or not.
Known bottlenecks to issuing multiple instructions include such control dependencies. Parallel processing is extremely important in operation intensive processes, particularly in real time digital video and audio processing. For example, in a conventional system, operations on two 8-pixel vectors are typically performed one pixel at a time. However, this method requires multiple clock cycles to complete.
Graphics and video processing are operation intensive. At the same time, high-speed processing is particularly important in the areas of video processing, image compression and decompression. Furthermore, with the growth of the "multi-media" desktop, it is imperative that processors accommodate high-speed graphics, video processing, and image compression/decompression to execute multimedia applications. With the rise in demand for these electronic devices, large quantities of data must be manipulated.
Signals requiring manipulation often contain an enormous amount of information. For example, a digital NTSC signal generates approximately 10.4 million pixels per second. Since each pixel contains information for three colors, the total amount of information is more than 30 million pieces of data per second. At a CPU clock rate of 200 MHz, only 20 clock cycles are available for processing each pixel. This results in less than seven clock cycles available per color component. Moreover, in order to provide a smooth transition during real-time video processing, it is necessary to process each frame prior to its display. Therefore, processing speed is particularly important in real-time signal processing applications.
Manipulation of video and image signals is required in many applications, including video and image processing functions. When video signals are manipulated, the result may exceed a desired upper range signal magnitude. For example, in many applications, acceptable pixel values range from 0 to 255. Therefore, an "overflow" occurs when the magnitude of a resulting video signal is greater than 255.
Referring now to FIG. 1, a flow diagram illustrating a method for handling overflow in saturation mode during the processing of video signal data according to the prior art is shown. At step 10, a data byte from a first group of video image data is loaded into a first memory location. At step 12, a data byte from a second group of video image data is loaded into a second memory location. Next, at step 14, the data byte from the first group of video image data is added to the data byte from the second group of video image data. At step 16, the processor causes the result of step 14 to be written into a third memory location. Next, at step 18, the result is compared with an upper range signal magnitude. If the result exceeds the upper range signal magnitude, the upper range signal magnitude is transferred to the third memory location at step 20. If the sum does not exceed the upper range signal magnitude, execution of the final write operation is bypassed at step 22. The step following the branch, or comparison step, has a procedural dependency on the branch and cannot be executed until the branch is executed. This is true regardless of whether the branch is taken or not. A need exists in the prior art for a method for handling an overflow condition in a processor without the use of a branch.